PFC Multipliers

Simulated Multiplier Performance

The underlying mathematical theory of Gilbert two-quadrant multipliers has been covered previously. We now look at how the simulated multiplier behaves.

Multiplication and Division Functions

The circuit that was explained previously is repeated below.

R1 and R2 develop voltage drops that raise the bottom ends of the Q4, Q5 diodes above ground, to about 2.1 V. This gives ground-referenced vS room to operate as a current sink. As the input voltage increases, the fraction of I1 through Q4 decreases. In other words, as the node 4 voltage is increased by vS, Q4 is being biased toward off and its current decreases as its emitter voltage increases. This causes, I1 to be diverted through Q5, and its base-emitter voltage increases with current. This causes its emitter voltage to decrease (relative to ground). Consequently, in the next stage, Q1 turns on harder and Q2 "throttles back." The output voltage is increased. The common-base stage, Q3, keeps the current amplifier output voltage above ground (at about 5.7 V) to keep Q2 from saturating.

The key equation relating input, current sources, and output is:

This is the ideal function. Simulating the multiplier effect of I2, the resulting dc plots are shown below. The x-axis is the input voltage (0 V to 3 V). The bottom plot is for I2 = 0. Without emitter current, there is no output current. As I2 is incremented in 20 μA steps, the slope of the output/input voltage increases, which is the amplifier voltage gain. Note that the functions are linear (straight), as far as can be observed graphically.

The second simulated graph of the above circuit is with I1 – the divider source – as parameter, again in 20 μA increments, from 0 μA to 100 μA. The rightmost plot is for 100 μA. Again, the plots appear linear until just before the full-scale output voltage is reached. But as the current-source current is increased, the slopes (gains) decrease instead, as is expected of a divider function. 

The gain-cell multiplier consisting of Q1, Q2, Icls1, and I2 is available as the fifty-cent, 8-pin CA3080E IC, from Intersil (previously, Harris). Or the 75-cent National Semiconductor LM13700 includes matched diodes (for Q4, Q5) in the 14-pin package of dual amplifiers and an additional emitter-follower, for use as a voltage buffer. For a line-operated PFC, current-source I1 can be a single resistor connected to the rectified sinusoidal input.

Ó Dennis L. Feucht, 2000